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Libretro
RACE
Commits
f2f80a8e
Unverified
Commit
f2f80a8e
authored
Jul 11, 2021
by
Libretro-Admin
Committed by
GitHub
Jul 11, 2021
Browse files
Merge pull request #23 from john-parton/feature/rs90
Add RS90 platform.
parents
569c25d6
b34c5fa2
Pipeline
#38929
passed with stages
in 8 minutes and 26 seconds
Changes
2
Pipelines
7
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.gitlab-ci.yml
View file @
f2f80a8e
...
...
@@ -243,3 +243,9 @@ libretro-build-dingux-odbeta-mips32:
extends
:
-
.libretro-dingux-odbeta-mips32-make-default
-
.core-defs
# RS-90 OpenDingux Beta
libretro-build-rs90-odbeta-mips32
:
extends
:
-
.libretro-rs90-odbeta-mips32-make-default
-
.core-defs
Makefile
View file @
f2f80a8e
...
...
@@ -322,6 +322,18 @@ else ifeq ($(platform), emscripten)
TARGET
:=
$(TARGET_NAME)
_libretro_
$(platform)
.bc
STATIC_LINKING
=
1
# RS90
else
ifeq
($(platform), rs90)
TARGET
:=
$(TARGET_NAME)
_libretro.so
CC
=
/opt/rs90-toolchain/usr/bin/mipsel-linux-gcc
CXX
=
/opt/rs90-toolchain/usr/bin/mipsel-linux-g++
AR
=
/opt/rs90-toolchain/usr/bin/mipsel-linux-ar
fpic
:=
-fPIC
SHARED
:=
-shared
-Wl
,-version-script
=
$(LIBRETRO_DIR)
/link.T
PLATFORM_DEFINES
:=
-DCC_RESAMPLER
-DCC_RESAMPLER_NO_HIGHPASS
CFLAGS
+=
-fomit-frame-pointer
-ffast-math
-march
=
mips32
-mtune
=
mips32
CXXFLAGS
+=
$(CFLAGS)
# GCW0
else
ifeq
($(platform), gcw0)
TARGET
:=
$(TARGET_NAME)
_libretro.so
...
...
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