RustyNES v0.6.0 - Accuracy Improvements (Milestone 7 Complete)
Phase 1.5 Stabilization - First Milestone Complete
Released: December 20, 2025
HIGHLIGHTS
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- APU frame counter precision: Fixed 4-step mode timing (22371->22372 cycles)
- Hardware-accurate audio mixer: Non-linear TND formula matching NESdev reference
- OAM DMA cycle precision: 513 cycles (even CPU start) vs 514 cycles (odd CPU start)
- CPU cycle parity tracking for accurate DMA alignment
- 429 tests passing with 0 failures, 6 ignored (valid architectural reasons)
M7 SPRINT 1: CPU ACCURACY
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- All 256 opcodes verified against nestest.nes golden log
- Page boundary crossing timing accuracy confirmed
- Unofficial opcode cycle counts validated
- Interrupt timing precision verified
M7 SPRINT 2: PPU ACCURACY
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- VBlank/NMI timing functional with flag read/race condition handling
- Sprite 0 hit detection working (2/2 basic tests passing)
- Attribute shift register verification complete
- Palette RAM mirroring edge cases handled
M7 SPRINT 3: APU ACCURACY
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- Frame counter precision fixed: 4-step mode quarter frame at cycle 22372 (was 22371)
- Hardware-accurate non-linear mixer: NESdev TND formula implemented
- Triangle linear counter timing verified
- Mixer output validated against reference implementation
M7 SPRINT 4: TIMING & SYNCHRONIZATION
=====================================
- OAM DMA cycle precision: 513 cycles (even CPU start) vs 514 cycles (odd CPU start)
- CPU cycle parity tracking for accurate DMA alignment
- CPU/PPU synchronization verified
- Bus timing accuracy confirmed
TECHNICAL SPECIFICATIONS
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- APU Frame Counter (4-step): Cycles 7457, 14913, 22372, 29830
- TND Mixer Formula: 159.79 / (100 + 1 / (triangle/8227 + noise/12241 + dmc/22638))
- OAM DMA Timing: 513 + if (cpu_cycles % 2) == 1 { 1 } else { 0 }
QUALITY METRICS
===============
- 429 tests passing
- 0 test failures
- 6 tests ignored (valid architectural reasons)
- Zero regressions from v0.5.0
DEFERRED TO M8+
===============
- Cycle-by-cycle CPU execution (architectural refactor for +/-2 cycle PPU precision)
- DMC DMA cycle stealing conflicts
- Additional sprite 0 hit edge cases
WHAT'S NEXT
===========
M8: Test ROM Validation - Target 95%+ pass rate on blargg test suites
Full changelog: https://github.com/doublegate/RustyNES/blob/main/CHANGELOG.md