Commit 8f41faa0 authored by Flyinghead's avatar Flyinghead
Browse files

rec-arm64: use SSA, generate main loop

Fix xtrct canonical implementation
parent 5ba8bed4
...@@ -96,7 +96,7 @@ void ngen_init(); ...@@ -96,7 +96,7 @@ void ngen_init();
extern void (*ngen_Compile)(RuntimeBlockInfo* block,bool force_checks, bool reset, bool staging,bool optimise); extern void (*ngen_Compile)(RuntimeBlockInfo* block,bool force_checks, bool reset, bool staging,bool optimise);
//Called when blocks are reseted //Called when blocks are reseted
void ngen_ResetBlocks(); extern void (*ngen_ResetBlocks)();
//Value to be returned when the block manager failed to find a block, //Value to be returned when the block manager failed to find a block,
//should call rdv_FailedToFindBlock and then jump to the return value //should call rdv_FailedToFindBlock and then jump to the return value
extern void (*ngen_FailedToFindBlock)(); extern void (*ngen_FailedToFindBlock)();
......
...@@ -1048,10 +1048,10 @@ u32,f1,(u32 r1, u32 r2), ...@@ -1048,10 +1048,10 @@ u32,f1,(u32 r1, u32 r2),
) )
shil_compile shil_compile
( (
shil_cf_arg_ptr(rs2); shil_cf_arg_u32(rs2);
shil_cf_arg_ptr(rs1); shil_cf_arg_u32(rs1);
shil_cf_arg_ptr(rd);
shil_cf(f1); shil_cf(f1);
shil_cf_rv_u32(rd);
) )
shil_opc_end() shil_opc_end()
......
...@@ -20,8 +20,11 @@ ...@@ -20,8 +20,11 @@
#ifndef CORE_REC_ARM64_ARM64_REGALLOC_H_ #ifndef CORE_REC_ARM64_ARM64_REGALLOC_H_
#define CORE_REC_ARM64_ARM64_REGALLOC_H_ #define CORE_REC_ARM64_ARM64_REGALLOC_H_
#ifdef OLD_REGALLOC
#include "hw/sh4/dyna/regalloc.h" #include "hw/sh4/dyna/regalloc.h"
#else
#include "hw/sh4/dyna/ssa_regalloc.h"
#endif
#include "deps/vixl/aarch64/macro-assembler-aarch64.h" #include "deps/vixl/aarch64/macro-assembler-aarch64.h"
using namespace vixl::aarch64; using namespace vixl::aarch64;
...@@ -67,7 +70,15 @@ struct Arm64RegAlloc : RegAlloc<eReg, eFReg ...@@ -67,7 +70,15 @@ struct Arm64RegAlloc : RegAlloc<eReg, eFReg
const VRegister& MapVRegister(const shil_param& param, u32 index = 0) const VRegister& MapVRegister(const shil_param& param, u32 index = 0)
{ {
#ifdef OLD_REGALLOC
eFReg ereg = mapfv(param, index); eFReg ereg = mapfv(param, index);
#else
#ifdef EXPLODE_SPANS
#error EXPLODE_SPANS not supported with ssa regalloc
#endif
verify(index == 0);
eFReg ereg = mapf(param);
#endif
if (ereg == (eFReg)-1) if (ereg == (eFReg)-1)
die("VRegister not allocated"); die("VRegister not allocated");
return VRegister::GetSRegFromCode(ereg); return VRegister::GetSRegFromCode(ereg);
......
This diff is collapsed.
...@@ -26,6 +26,12 @@ void ngen_blockcheckfail_CC(u32 pc) { ...@@ -26,6 +26,12 @@ void ngen_blockcheckfail_CC(u32 pc) {
printf("REC CPP: SMC invalidation at %08X\n", pc); printf("REC CPP: SMC invalidation at %08X\n", pc);
rdv_BlockCheckFail(pc); rdv_BlockCheckFail(pc);
} }
int idxnxx = 0;
void ngen_ResetBlocks_cpp(void)
{
idxnxx = 0;
}
class opcodeExec { class opcodeExec {
public: public:
......
...@@ -3,11 +3,14 @@ ...@@ -3,11 +3,14 @@
int cycle_counter; int cycle_counter;
static void ngen_ResetBlocksNop() { }
void (*ngen_Compile)(RuntimeBlockInfo* block,bool force_checks, bool reset, bool staging,bool optimise); void (*ngen_Compile)(RuntimeBlockInfo* block,bool force_checks, bool reset, bool staging,bool optimise);
void (*ngen_CC_Start)(shil_opcode* op); void (*ngen_CC_Start)(shil_opcode* op);
void (*ngen_CC_Call)(shil_opcode*op, void* function); void (*ngen_CC_Call)(shil_opcode*op, void* function);
void (*ngen_CC_Param)(shil_opcode* op, shil_param* par, CanonicalParamType tp); void (*ngen_CC_Param)(shil_opcode* op, shil_param* par, CanonicalParamType tp);
void (*ngen_CC_Finish)(shil_opcode* op); void (*ngen_CC_Finish)(shil_opcode* op);
void (*ngen_ResetBlocks)() = &ngen_ResetBlocksNop;
void ngen_init(void) void ngen_init(void)
{ {
...@@ -53,6 +56,7 @@ void ngen_init(void) ...@@ -53,6 +56,7 @@ void ngen_init(void)
extern void ngen_CC_Call_arm64(shil_opcode* op,void* function); extern void ngen_CC_Call_arm64(shil_opcode* op,void* function);
extern void ngen_CC_Param_arm64(shil_opcode* op,shil_param* par,CanonicalParamType tp); extern void ngen_CC_Param_arm64(shil_opcode* op,shil_param* par,CanonicalParamType tp);
extern void ngen_CC_Finish_arm64(shil_opcode* op); extern void ngen_CC_Finish_arm64(shil_opcode* op);
extern void ngen_ResetBlocks_arm64();
ngen_init_arm64(); ngen_init_arm64();
ngen_Compile = ngen_Compile_arm64; ngen_Compile = ngen_Compile_arm64;
...@@ -60,6 +64,7 @@ void ngen_init(void) ...@@ -60,6 +64,7 @@ void ngen_init(void)
ngen_CC_Call = ngen_CC_Call_arm64; ngen_CC_Call = ngen_CC_Call_arm64;
ngen_CC_Param = ngen_CC_Param_arm64; ngen_CC_Param = ngen_CC_Param_arm64;
ngen_CC_Finish = ngen_CC_Finish_arm64; ngen_CC_Finish = ngen_CC_Finish_arm64;
ngen_ResetBlocks = ngen_ResetBlocks_arm64;
break; break;
#elif FEAT_SHREC == DYNAREC_JIT && HOST_CPU == CPU_X64 #elif FEAT_SHREC == DYNAREC_JIT && HOST_CPU == CPU_X64
...@@ -89,12 +94,14 @@ void ngen_init(void) ...@@ -89,12 +94,14 @@ void ngen_init(void)
extern void ngen_CC_Call_cpp(shil_opcode*op, void* function); extern void ngen_CC_Call_cpp(shil_opcode*op, void* function);
extern void ngen_CC_Param_cpp(shil_opcode* op,shil_param* par,CanonicalParamType tp); extern void ngen_CC_Param_cpp(shil_opcode* op,shil_param* par,CanonicalParamType tp);
extern void ngen_CC_Finish_cpp(shil_opcode* op); extern void ngen_CC_Finish_cpp(shil_opcode* op);
extern void ngen_ResetBlocks_cpp();
ngen_Compile = ngen_Compile_cpp; ngen_Compile = ngen_Compile_cpp;
ngen_CC_Start = ngen_CC_Start_cpp; ngen_CC_Start = ngen_CC_Start_cpp;
ngen_CC_Call = ngen_CC_Call_cpp; ngen_CC_Call = ngen_CC_Call_cpp;
ngen_CC_Param = ngen_CC_Param_cpp; ngen_CC_Param = ngen_CC_Param_cpp;
ngen_CC_Finish = ngen_CC_Finish_cpp; ngen_CC_Finish = ngen_CC_Finish_cpp;
ngen_ResetBlocks = ngen_ResetBlocks_cpp;
#endif #endif
break; break;
} }
...@@ -105,13 +112,3 @@ void ngen_GetFeatures(ngen_features* dst) ...@@ -105,13 +112,3 @@ void ngen_GetFeatures(ngen_features* dst)
dst->InterpreterFallback = false; dst->InterpreterFallback = false;
dst->OnlyDynamicEnds = false; dst->OnlyDynamicEnds = false;
} }
int idxnxx = 0;
void ngen_ResetBlocks(void)
{
#ifndef NDEBUG
printf("@@\tngen_ResetBlocks()\n");
#endif
idxnxx = 0;
}
...@@ -675,7 +675,7 @@ extern u32 NAOMI_COMM_DATA; ...@@ -675,7 +675,7 @@ extern u32 NAOMI_COMM_DATA;
//./core/rec.o //./core/rec.o
extern int cycle_counter; extern int cycle_counter;
extern int idxnxx; //extern int idxnxx;
...@@ -1191,7 +1191,7 @@ bool dc_serialize(void **data, unsigned int *total_size) ...@@ -1191,7 +1191,7 @@ bool dc_serialize(void **data, unsigned int *total_size)
LIBRETRO_S(NaomiDataRead); LIBRETRO_S(NaomiDataRead);
LIBRETRO_S(cycle_counter); LIBRETRO_S(cycle_counter);
LIBRETRO_S(idxnxx); LIBRETRO_S(i); // idxnxx
#if FEAT_SHREC != DYNAREC_NONE #if FEAT_SHREC != DYNAREC_NONE
LIBRETRO_S(state); LIBRETRO_S(state);
...@@ -1672,7 +1672,7 @@ bool dc_unserialize(void **data, unsigned int *total_size, size_t actual_data_si ...@@ -1672,7 +1672,7 @@ bool dc_unserialize(void **data, unsigned int *total_size, size_t actual_data_si
} }
LIBRETRO_US(cycle_counter); LIBRETRO_US(cycle_counter);
LIBRETRO_US(idxnxx); LIBRETRO_US(dummy_int); // idxnxx
#if FEAT_SHREC != DYNAREC_NONE #if FEAT_SHREC != DYNAREC_NONE
LIBRETRO_US(state); LIBRETRO_US(state);
......
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