Commit d1e2db46 authored by Flyinghead's avatar Flyinghead
Browse files

arm64: direct mem access and crash fix

generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
save x30 in ngen_mainloop prologue (fix libretro crash)
get rid of literals and use pc-rel branching
use explode_spans to allocate regs for V2 and F64 params
minor optimizations and cleanup
parent 275cf48d
......@@ -58,7 +58,7 @@ void Assembler::bind(Label* label) {
void Assembler::BindToOffset(Label* label, ptrdiff_t offset) {
VIXL_ASSERT((offset >= 0) && (offset <= GetBuffer()->GetCursorOffset()));
//VIXL_ASSERT((offset >= 0) && (offset <= GetBuffer()->GetCursorOffset())); // hack to have negative offsets
VIXL_ASSERT(offset % kInstructionSize == 0);
label->Bind(offset);
......
......@@ -49,7 +49,7 @@ class Label {
VIXL_ASSERT(!IsLinked());
}
bool IsBound() const { return location_ >= 0; }
bool IsBound() const { return location_ != kLocationUnbound; }
bool IsLinked() const { return !links_.empty(); }
ptrdiff_t GetLocation() const { return location_; }
......
......@@ -78,7 +78,7 @@ class CodeBuffer {
template <typename T>
T GetOffsetAddress(ptrdiff_t offset) const {
VIXL_STATIC_ASSERT(sizeof(T) >= sizeof(uintptr_t));
VIXL_ASSERT((offset >= 0) && (offset <= (cursor_ - buffer_)));
//VIXL_ASSERT((offset >= 0) && (offset <= (cursor_ - buffer_))); // hack to have negative offsets
return reinterpret_cast<T>(buffer_ + offset);
}
......
......@@ -30,10 +30,6 @@ op_agent_t oprofHandle;
#if FEAT_SHREC != DYNAREC_NONE
#define BLOCKS_IN_PAGE_LIST_COUNT (RAM_SIZE/4096)
/* Naomi edit - allow for max possible size */
bm_List blocks_page[/*BLOCKS_IN_PAGE_LIST_COUNT*/(32*1024*1024)/4096];
bm_List all_blocks;
bm_List del_blocks;
#include <set>
......@@ -96,12 +92,6 @@ RuntimeBlockInfo* bm_GetStaleBlock(void* dynarec_code)
void bm_AddBlock(RuntimeBlockInfo* blk)
{
/*
if (IsOnRam(blk->addr) && PageIsConst(blk->addr))
{
blocks_page[(blk->addr&RAM_MASK)/PAGE_SIZE].push_back(blk);
}
*/
all_blocks.push_back(blk);
if (blkmap.find(blk)!=blkmap.end())
{
......@@ -332,11 +322,6 @@ void bm_vmem_pagefill(void** ptr,u32 PAGE_SZ)
void bm_Reset()
{
ngen_ResetBlocks();
for (u32 i=0; i<BLOCKS_IN_PAGE_LIST_COUNT; i++)
{
blocks_page[i].clear();
}
_vmem_bm_reset();
for (size_t i=0; i<all_blocks.size(); i++)
......
/*
In case you wonder, the extern "C" stuff are for the assembly code on beagleboard/pandora
*/
#include <map>
#include "types.h"
#include "decoder.h"
#include <set>
......@@ -73,6 +74,7 @@ struct RuntimeBlockInfo: RuntimeBlockInfo_Core
u32 memops;
u32 linkedmemops;
std::map<void*, u32> memory_accesses; // key is host pc when access is made, value is opcode id
};
struct CachedBlockInfo: RuntimeBlockInfo_Core
......
......@@ -465,10 +465,6 @@ struct RegAlloc
for (int i=reg_gbr;i<=reg_fpul;i++)
flush_span(i);
for (int i=reg_gbr;i<=reg_fpul;i++)
flush_span(i);
switch(OpDesc[op->rs3._imm]->mask)
{
case Mask_imm8:
......
......@@ -244,8 +244,6 @@ struct rei_host_context_t
u32 esp;
#elif HOST_CPU == CPU_ARM
u32 r[15];
#elif HOST_CPU == CPU_ARM64
u64 r[31];
#endif
};
......@@ -279,10 +277,6 @@ static void context_segfault(rei_host_context_t* reictx, void* segfault_ctx, boo
#endif
#elif HOST_CPU == CPU_ARM64
bicopy(reictx->pc, MCTX(.pc), to_segfault);
u64* r =(u64*) &MCTX(.regs[0]);
for (int i = 0; i < 31; i++)
bicopy(reictx->r[i], r[i], to_segfault);
#elif HOST_CPU == CPU_X86
#ifdef __linux__
bicopy(reictx->pc, MCTX(.gregs[REG_EIP]), to_segfault);
......@@ -390,7 +384,10 @@ printf("mprot hit @ ptr %p @@ pc: %p, %d\n", si->si_addr, ctx.pc, dyna_cde);
#elif HOST_CPU == CPU_X64
//x64 has no rewrite support
#elif HOST_CPU == CPU_ARM64
// arm64 has no rewrite support
else if (dyna_cde && ngen_Rewrite(ctx.pc, 0, 0))
{
context_to_segfault(&ctx, segfault_ctx);
}
#else
#error JIT: Not supported arch
#endif
......
......@@ -34,12 +34,16 @@ enum eFReg {
S17, S18, S19, S20, S21, S22, S23, S24, S25, S26, S27, S28, S29, S30, S31
};
static eReg alloc_regs[] = { W19, W20, W21, W22, W23, W24, W25, W26, (eReg)-1 };
static eReg alloc_regs[] = { W19, W20, W21, W22, W23, W24, W25, W26, W29, (eReg)-1 };
static eFReg alloc_fregs[] = { S8, S9, S10, S11, S12, S13, S14, S15, (eFReg)-1 };
class Arm64Assembler;
struct Arm64RegAlloc : RegAlloc<eReg, eFReg, false> // TODO explode_spans=true (default, x86) breaks things. Why?
struct Arm64RegAlloc : RegAlloc<eReg, eFReg
#ifndef EXPLODE_SPANS
, false
#endif
>
{
Arm64RegAlloc(Arm64Assembler *assembler) : assembler(assembler) {}
......
This diff is collapsed.
......@@ -43,7 +43,7 @@ void ngen_init(void)
ngen_CC_Call = ngen_CC_Call_arm;
ngen_CC_Param = ngen_CC_Param_arm;
ngen_CC_Finish = ngen_CC_Finish_arm;
#elif FEAT_SHREC == DYNAREC_JIT && HOST_CPU == CPU_ARM64 && 0 // FIXME
#elif FEAT_SHREC == DYNAREC_JIT && HOST_CPU == CPU_ARM64
extern void ngen_init_arm64(void);
extern void ngen_Compile_arm64(RuntimeBlockInfo* block,bool force_checks, bool reset, bool staging,bool optimise);
extern void ngen_CC_Start_arm64(shil_opcode* op);
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment