GitLab

pass exception pc in x2 reg for both slow/fast paths
infer the op type and size from the armv8 op encoding
rewrite doesn't need access to the block anymore
add support for some imm args

ssa: swap setpeq args in ssa if first is imm

Fix xtrct canonical implementation

native implementation of negc and xtrct for x64 and arm64
inline mmu_intruction_translation() and clean up

Log error when writing to flash ram

AICA arm7 dynarec implementation for arm64
Use tail calling and block linking in sh4 dynarec
Revert to not using "explode spans" as it's slower

Fix float precision issue on x64 when using AVX instructions
Minor optimizations for x64 and arm64

generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
save x30 in ngen_mainloop prologue (fix libretro crash)
get rid of literals and use pc-rel branching
use explode_spans to allocate regs for V2 and F64 params
minor optimizations and cleanup