Commit ba373ca7 authored by Arisotura's avatar Arisotura
Browse files

DSi: make ARM9-clock-selector actually work

parent e27d5550
...@@ -616,11 +616,11 @@ void ARMv5::CP15Write(u32 id, u32 val) ...@@ -616,11 +616,11 @@ void ARMv5::CP15Write(u32 id, u32 val)
case 0xF00: case 0xF00:
//printf("cache debug index register %08X\n", val); //printf("cache debug index register %08X\n", val);
return; return;
case 0xF10: case 0xF10:
//printf("cache debug instruction tag %08X\n", val); //printf("cache debug instruction tag %08X\n", val);
return; return;
case 0xF20: case 0xF20:
//printf("cache debug data tag %08X\n", val); //printf("cache debug data tag %08X\n", val);
return; return;
...@@ -632,7 +632,7 @@ void ARMv5::CP15Write(u32 id, u32 val) ...@@ -632,7 +632,7 @@ void ARMv5::CP15Write(u32 id, u32 val)
case 0xF40: case 0xF40:
//printf("cache debug data cache %08X\n", val); //printf("cache debug data cache %08X\n", val);
return; return;
} }
if ((id & 0xF00) == 0xF00) // test/debug shit? if ((id & 0xF00) == 0xF00) // test/debug shit?
......
...@@ -699,20 +699,37 @@ void MapNWRAMRange(u32 cpu, u32 num, u32 val) ...@@ -699,20 +699,37 @@ void MapNWRAMRange(u32 cpu, u32 num, u32 val)
} }
} }
void ApplyNewRAMSize(u32 size)
{
switch (size)
{
case 0:
case 1:
NDS::MainRAMMask = 0x3FFFFF;
printf("RAM: 4MB\n");
break;
case 2:
case 3: // TODO: debug console w/ 32MB?
NDS::MainRAMMask = 0xFFFFFF;
printf("RAM: 16MB\n");
break;
}
}
void Set_SCFG_Clock9(u16 val) void Set_SCFG_Clock9(u16 val)
{ {
SCFG_Clock9 = val & 0x0187;
return;
NDS::ARM9Timestamp >>= NDS::ARM9ClockShift; NDS::ARM9Timestamp >>= NDS::ARM9ClockShift;
NDS::ARM9Target >>= NDS::ARM9ClockShift;
printf("CLOCK9=%04X\n", val); printf("CLOCK9=%04X\n", val);
SCFG_Clock9 = val & 0x0187; SCFG_Clock9 = val & 0x0187;
if (SCFG_Clock9 & (1<<0)) NDS::ARM9ClockShift = 2; if (SCFG_Clock9 & (1<<0)) NDS::ARM9ClockShift = 2;
else NDS::ARM9ClockShift = 1; else NDS::ARM9ClockShift = 1;
NDS::ARM9Timestamp <<= NDS::ARM9ClockShift; NDS::ARM9Timestamp <<= NDS::ARM9ClockShift;
NDS::ARM9Target <<= NDS::ARM9ClockShift;
NDS::ARM9->UpdateRegionTimings(0x00000000, 0xFFFFFFFF); NDS::ARM9->UpdateRegionTimings(0x00000000, 0xFFFFFFFF);
} }
...@@ -1549,25 +1566,37 @@ void ARM9IOWrite32(u32 addr, u32 val) ...@@ -1549,25 +1566,37 @@ void ARM9IOWrite32(u32 addr, u32 val)
switch (addr) switch (addr)
{ {
case 0x04004008: case 0x04004008:
SCFG_EXT[0] &= ~0x8007F19F;
SCFG_EXT[0] |= (val & 0x8007F19F);
SCFG_EXT[1] &= ~0x0000F080;
SCFG_EXT[1] |= (val & 0x0000F080);
printf("SCFG_EXT = %08X / %08X (val9 %08X)\n", SCFG_EXT[0], SCFG_EXT[1], val);
/*switch ((SCFG_EXT[0] >> 14) & 0x3)
{ {
case 0: u32 oldram = (SCFG_EXT[0] >> 14) & 0x3;
case 1: u32 newram = (val >> 14) & 0x3;
NDS::MainRAMMask = 0x3FFFFF;
printf("RAM: 4MB\n"); SCFG_EXT[0] &= ~0x8007F19F;
break; SCFG_EXT[0] |= (val & 0x8007F19F);
case 2: SCFG_EXT[1] &= ~0x0000F080;
case 3: // TODO: debug console w/ 32MB? SCFG_EXT[1] |= (val & 0x0000F080);
NDS::MainRAMMask = 0xFFFFFF; printf("SCFG_EXT = %08X / %08X (val9 %08X)\n", SCFG_EXT[0], SCFG_EXT[1], val);
printf("RAM: 16MB\n"); /*switch ((SCFG_EXT[0] >> 14) & 0x3)
break; {
}*/ case 0:
printf("from %08X, ARM7 %08X, %08X\n", NDS::GetPC(0), NDS::GetPC(1), NDS::ARM7->R[1]); case 1:
NDS::MainRAMMask = 0x3FFFFF;
printf("RAM: 4MB\n");
//baziderp=true;
break;
case 2:
case 3: // TODO: debug console w/ 32MB?
NDS::MainRAMMask = 0xFFFFFF;
printf("RAM: 16MB\n");
break;
}*/
// HAX!!
// a change to the RAM size setting is supposed to apply immediately (it does so on hardware)
// however, doing so will cause DS-mode app startup to break, because the change happens while the ARM7
// is still busy clearing/relocating shit
//if (newram != oldram)
// NDS::ScheduleEvent(NDS::Event_DSi_RAMSizeChange, false, 512*512*512, ApplyNewRAMSize, newram);
printf("from %08X, ARM7 %08X, %08X\n", NDS::GetPC(0), NDS::GetPC(1), NDS::ARM7->R[1]);
}
return; return;
case 0x04004040: case 0x04004040:
......
...@@ -1817,15 +1817,16 @@ void debug(u32 param) ...@@ -1817,15 +1817,16 @@ void debug(u32 param)
fwrite(&val, 4, 1, shit); fwrite(&val, 4, 1, shit);
} }
fclose(shit);*/ fclose(shit);*/
FILE* FILE*
shit = fopen("debug/dump9.bin", "wb"); shit = fopen("debug/picto9.bin", "wb");
for (u32 i = 0x02000000; i < 0x04000000; i+=4) for (u32 i = 0x02000000; i < 0x04000000; i+=4)
{ {
u32 val = DSi::ARM9Read32(i); u32 val = DSi::ARM9Read32(i);
fwrite(&val, 4, 1, shit); fwrite(&val, 4, 1, shit);
} }
fclose(shit); fclose(shit);
shit = fopen("debug/dump7.bin", "wb"); shit = fopen("debug/picto7.bin", "wb");
for (u32 i = 0x02000000; i < 0x04000000; i+=4) for (u32 i = 0x02000000; i < 0x04000000; i+=4)
{ {
u32 val = DSi::ARM7Read32(i); u32 val = DSi::ARM7Read32(i);
......
...@@ -47,6 +47,8 @@ enum ...@@ -47,6 +47,8 @@ enum
Event_DSi_SDIOTransfer, Event_DSi_SDIOTransfer,
Event_DSi_NWifi, Event_DSi_NWifi,
Event_DSi_RAMSizeChange,
Event_MAX Event_MAX
}; };
......
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