Here's the original compiler warning:
../../core/hw/sh4/dyna/shil.cpp:700:24: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
  ...if (op->rd.is_reg() && op->rd._reg==reg_sr_T ||  op->op==shop_ifb)
         ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~ ~~
../../core/hw/sh4/dyna/shil.cpp:700:24: note: place parentheses around the '&&'
      expression to silence this warning
  ...if (op->rd.is_reg() && op->rd._reg==reg_sr_T ||  op->op==shop_ifb)
                         ^
         (                                       )
../../core/hw/sh4/dyna/shil.cpp:843:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                        if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
                            ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:843:25: note: place parentheses around the '&&'
      expression to silence this warning
                        if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
                                             ^
                            (                                         )
../../core/hw/sh4/dyna/shil.cpp:844:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                                || op->rs2.is_reg() &&
op->rs2._reg==reg_sr_T
                                ~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:844:25: note: place parentheses around the '&&'
      expression to silence this warning
                                || op->rs2.is_reg() && op->rs2._reg==reg_sr_T
                                                    ^
                                   (                                         )
../../core/hw/sh4/dyna/shil.cpp:845:25: warning: '&&' within '||'
      [-Wlogical-op-parentheses]
                                || op->rs3.is_reg() && op->rs3._reg==reg_sr_T
                                ~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:845:25: note: place parentheses around the '&&'
      expression to silence this warning
                                || op->rs3.is_reg() && op->rs3._reg==reg_sr_T
                                                    ^
                                   (                                         )